White Paper: The Evolution of Memory Tiering at Scale
![Image](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhNBXhkFP4LFqsRgF1pCb8vZOrV1UyPyMWSpDH1Y9xRnlblpDkLRgrH3QSk2UkD6v8qLeVHlHjdSFnCxMrE7m3sWWBWL0hTq4viBdVtYxvQnmmmcYykJwOAOG4v0zRBKaymk0KRnC2Z69MQM4paGU6KZDmIVTpGQCD5pVMtXbyLLP1h_9mn_ym838eG/w640-h360/Framed%20cover.png)
With first-generation chips now available, the early hype around CXL is giving way to realistic performance expectations. At the same time, software support for memory tiering is advancing, building on prior work around NUMA and persistent memory. Finally, operators have deployed RDMA to enable storage disaggregation and high-performance workloads. Thanks to these advancements, main-memory disaggregation is now within reach. Enfabrica sponsored the creation of this white paper, but the opinions and analysis are those of the author. Download the full white paper for free, no registration required.